Reconfigurable circuits have been widely used in the semiconductor industry for field programmable gate arrays (FPGAs) and for repair of a defective memory element. The FPGA consists of a set of simple, configurable logic blocks in an array with interspersed switches that can rearrange the interconnections between the logic blocks.
Reconfigurable circuits are also expected to play a significant role in three-dimensional (3D) integration technology that is being currently developed. 3D integration fabricates multilayer structures that can form a single chip combination with different functionalities. In these multilayer (and multifunctional) systems, reconfigurable circuit connection is typically needed to provide controllable logic functionality, memory repair, data encryption as well as other functions.
Phase change material based programmable vias propose to offer advantages such as, for example, spatial compactness, no need for latches, multiple-shot reprogrammability, and immunity from soft errors, with no requirement of high switching voltage or high switching power, both in FPGA and 3D integration applications.
In the prior art, the concept of a programmable link structure for use in 3D integrated semiconductor devices is proposed. Although such proposals have been made, there has been no disclosure of a semiconductor structure which describes the basic configuration of such devices, let alone a process sequence that can be used in forming the same.